Mips/Registers - Revision history

Mzxrules at 17:34, 23 March 2021

2021-03-23T17:34:27Z

Mzxrules: Mzxrules moved page Registers to Mips/Registers

2018-04-09T04:34:10Z

Mzxrules moved page Registers to Mips/Registers

Mzxrules: /* Bitwise Operators (Shifting) */

2015-12-16T03:53:08Z

‎Bitwise Operators (Shifting)

Vexiant at 02:53, 16 December 2015

2015-12-16T02:53:31Z

Mzxrules: /* CPU General Purpose Registers */ No touchy $K1

2015-12-01T23:19:23Z

‎CPU General Purpose Registers: No touchy $K1

Vexiant: spacing, other minor misc

2015-11-21T06:51:32Z

spacing, other minor misc

Vexiant at 06:45, 21 November 2015

2015-11-21T06:45:44Z

Vexiant: stupid mistake

2015-11-20T17:29:52Z

stupid mistake

Vexiant at 04:31, 20 November 2015

2015-11-20T04:31:25Z

Show changes

Notwa at 23:34, 19 November 2015

2015-11-19T23:34:54Z

@@ Line 46: / Line 46: @@
-As seen below, each processor has 31 registers (CPU has 32). COP0 (MMU) converts virtual addresses into physical addresses, selects an operating mode and control exceptions, while COP1 (FPU) is for floating point operations, and COP2 (RCP), or the "Reality Co-Processor" which is composed of the RSP (signal) and RDP (drawing) and together acts as a polygon cruncher. The RSP uses [[F3DZEX|it's own microcode]] (uCodes).
+As seen below, each processor has 31 registers (CPU has 32). COP0 (MMU) converts virtual addresses into physical addresses, selects an operating mode and control exceptions, while COP1 (FPU) is for floating point operations, and COP2 (RCP), or the "Reality Co-Processor" which is composed of the RSP (signal) and RDP (drawing) and together acts as a polygon cruncher.
 ==CPU General Purpose Registers==
@@ Line 67: / Line 66: @@
 | 24-25 || $t8 - $t9 || '''T'''emporary registers (Subroutines can use without saving, but is not kept across procedure calls)
 |-
-| 26-27 || $k0 - $k1 || '''K'''ernel: used for the system's exception handler. Do NOT use $K0 or $K1
+| 26-27 || $k0 - $k1 || '''K'''ernel: reserved for kernel operations, most importantly thread context switching. Do NOT use $K0 or $K1 outside kernel code
 |-
 | 28 || $gp || '''G'''lobal '''P'''ointer*
@@ Line 82: / Line 81: @@
 ''Another Note: The stack is a place in memory where the game backs up registers temporarily while doing other things. Larger addresses being stored at the bottom of the stack, smaller at the top of the stack (otherwise known as "stack limit") The stack pointer is usually a register that contains the top of the stack.''
-The $K0 and $K1 registers should not be used because almost all mods will only modify code that is executed while the CPU is in "User" state. In user state, a hardware interrupt can occur at any point during execution, thus invalidating the $K0 and $K1 registers.
+Unless you're writing kernel code, the $K0 and $K1 registers should never be used in custom mods. The reason for this is that when an interrupt occurs (and hardware interrupts can occur at any time), execution jumps immediately into the interrupt vector table and the kernel takes over. The only registers available for free use is $k0 and $k1, so the state of these registers will be obliterated by the kernel code. You can disable hardware interrupts, but you're most likely better off finding a free general purpose register
 ==Co-processor 0 (COP0) Registers==

@@ Line 163: / Line 163: @@
 ===Bitwise Operators (Shifting)===
-I placed this here to just help with understanding left and right shift since I've received questions pertaining their usage and function. Put simply, bitwise operations are operations that, as the name suggests, take place on the smallest scale (bits) with the use of an operation. Outside of it's practical usage here, there are other reasons why programmers need to be familiar with operating on the bit level: sockets, bitfield flags, graphics, encryption, in tight loops you can avoid conditional statements with them, and so forth. Needless to say, bitwise operations are everywhere! Anyways, Left shift is denoted by << and Right is >>.
+Bitwise operations are operations that, as the name suggests, take place on the smallest scale (bits) with the use of an operation. Outside of it's practical usage here, there are other reasons why programmers need to be familiar with operating on the bit level: sockets, bitfield flags, graphics, encryption, in tight loops you can avoid conditional statements with them, and so forth. Needless to say, bitwise operations are everywhere! Anyways, Left shift is denoted by << and Right is >>.
 '''Left Shift''' (<<)
-Left shift works like multiplication. Shifting left makes all right-most bits shift over to the left and the zero's into blank spaces!
+Left shift works like multiplication. Shifting left makes all right-most bits shift over to the left, then fills zeros into blank spaces!
 '''Right Shift''' (>>)
 Right shift works like division. While shifting to the right, bits that cross the most right slot do not appear on the other side, but instead the newly shifted bits from the far most left side are zero's.
-With MIPS, though, we have the option of arithmetic (SRA/SLA) or logical shifts (SRL/SLL). SRA is an acronym for Shift Right Arithmetic and SRL stands for Shift Right Logical: SRA shifts will always result in 0's on the far left side, while SRL will treat the (MSB) as signed, preserve it, and shift the most significant bit into the other side. This is for dividing negative numbers.
+{|
- SRL: 1010 0111 >> 0101 0011
+With MIPS, though, we have the option of arithmetic (SRA) or logical shifts (SRL/SLL). SRA is an acronym for Shift Right Arithmetic and SRL stands for Shift Right Logical: SRL shifts will always result in 0's on the far left side, while SRA will treat the leftmost, or Most Significant Bit (MSB) as a sign bit, copying it's value into the "blank" spaces. This is for dividing negative numbers.
 '''''References'''''

← Older revision		Revision as of 02:53, 16 December 2015
Line 46:		Line 46:


−	As seen below, each processor has 31 registers (CPU has 32). COP0 (MMU) ~~is used for error exception handling~~ and ~~virtual address handling~~, while COP1 (FPU) is for floating point operations, and COP2 (RCP), or the "Reality Co-Processor" which is composed of the RSP (signal) and RDP (drawing) and together acts as a polygon cruncher. The RSP uses [[F3DZEX\|it's own microcode]] (uCodes).	+	As seen below, each processor has 31 registers (CPU has 32). COP0 (MMU) converts virtual addresses into physical addresses, selects an operating mode and control exceptions, while COP1 (FPU) is for floating point operations, and COP2 (RCP), or the "Reality Co-Processor" which is composed of the RSP (signal) and RDP (drawing) and together acts as a polygon cruncher. The RSP uses [[F3DZEX\|it's own microcode]] (uCodes).

@@ Line 67: / Line 67: @@
 | 24-25 || $t8 - $t9 || '''T'''emporary registers (Subroutines can use without saving, but is not kept across procedure calls)
 |-
-| 26-27 || $k0 - $k1 || '''K'''ernel: $K1 is an open register that's value is always 0xAAA unless you change it yourself (Do not use $K0, exception handler uses this)
+| 26-27 || $k0 - $k1 || '''K'''ernel: used for the system's exception handler. Do NOT use $K0 or $K1
 |-
 | 28 || $gp || '''G'''lobal '''P'''ointer*
@@ Line 81: / Line 81: @@
 ''Note: However, you can access the contents of Hi and Lo with special instruction MFHI ("move from Hi") and MFLO ("move from Lo"). ''
 ''Another Note: The stack is a place in memory where the game backs up registers temporarily while doing other things. Larger addresses being stored at the bottom of the stack, smaller at the top of the stack (otherwise known as "stack limit") The stack pointer is usually a register that contains the top of the stack.''
 ==Co-processor 0 (COP0) Registers==

@@ Line 158: / Line 158: @@
 <nowiki>*</nowiki>The value of saved registers are preserved across function calls. Any routine that uses a saved register must first store their value on the stack before use, and restore the value before exiting the routine.
 ===Bitwise Operators (Shifting)===
@@ Line 169: / Line 170: @@
 '''Right Shift''' (>>)
 Right shift works like division. While shifting to the right, bits that cross the most right slot do not appear on the other side, but instead the newly shifted bits from the far most left side are zero's.
   SRA: 0000 0000 0011 1100 >> 0000 0000 0000 1111
 With MIPS, though, we have the option of arithmetic (SRA/SLA) or logical shifts (SRL/SLL). SRA is an acronym for Shift Right Arithmetic and SRL stands for Shift Right Logical: SRA shifts will always result in 0's on the far left side, while SRL will treat the (MSB) as signed, preserve it, and shift the most significant bit into the other side. This is for dividing negative numbers.

← Older revision	Revision as of 04:34, 9 April 2018
(No difference)

@@ Line 49: / Line 49: @@
-===CPU General Purpose Registers===
+==CPU General Purpose Registers==
 {|class="wikitable"
 !Number||Name||Usage
@@ Line 69: / Line 69: @@
 | 26-27 || $k0 - $k1 || '''K'''ernel: $K1 is an open register that's value is always 0xAAA unless you change it yourself (Do not use $K0, exception handler uses this)
 |-
-| 28 || $gp || '''G''''lobal '''P'''ointer*
+| 28 || $gp || '''G'''lobal '''P'''ointer*
 |-
 | 29 || $sp || '''S'''tack '''P'''ointer* (points to the last location on the stack)
@@ Line 82: / Line 82: @@
 ''Another Note: The stack is a place in memory where the game backs up registers temporarily while doing other things. Larger addresses being stored at the bottom of the stack, smaller at the top of the stack (otherwise known as "stack limit") The stack pointer is usually a register that contains the top of the stack.''
-===Co-processor 0 (COP0) Registers===
+==Co-processor 0 (COP0) Registers==
 {|class="wikitable"
 !Number || Name || Usage
@@ Line 142: / Line 142: @@
 ''Translation Lookaside Buffer (TLB): Address aliasing/Virtual addresses are mapped to physical addresses through the TLB.''
-===Co-processor 1 (COP1) Registers===
+==Co-processor 1 (COP1) Registers==
 {|class="wikitable"
 !Number||Name||Usage
@@ Line 158: / Line 158: @@
 <nowiki>*</nowiki>The value of saved registers are preserved across function calls. Any routine that uses a saved register must first store their value on the stack before use, and restore the value before exiting the routine.
 '''''References'''''

@@ Line 19: / Line 19: @@
 {|class="wikitable"
-!Type||Size||Usage
+!Type||Size||Purpose
 |-
 | rs || 5-bit || source register specifier

@@ Line 11: / Line 11: @@
 | 4-7 || $a0 - $a3 || parameters passed to a function
 |-
-| 8-15 || $t0 - $t0 || Temporary registers
+| 8-15 || $t0 - $t7 || Temporary registers
 |-
 | 16-23 || $s0 - $s7 || Saved registers*, preserved across function calls
 |-
-| 24-25 || $t8-$t9 || Temporary registers
+| 24-25 || $t8 - $t9 || Temporary registers
 |-
 | 26-27 || $k0 - $k1 || Reserved for the kernel. Do not use